1. Field of the Invention
The present invention relates to a variable gain amplifier, and more particularly, to a variable gain amplifier having a large width of gain variation, a large bandwidth, and a temperature-independent gain.
2. Description of the Related Art
In general, variable gain amplifiers (VGAs) are used to provide a variable gain required in various electronic apparatus such as disk drives, hearing aids, medical equipments, and communication apparatuses. Since the amplitude of signals used for electronic apparatuses may have to be largely changed, gain variation in a range as wide as possible is required. For example, code division multiple access (CDMA) communication systems require a gain variation range of approximately 80 dB. That is, in a dB scale, a section in which a gain is linearly formed has to be wide.
Amplifiers having a variable gain linear in a dB scale may be easily obtained by applying a bipolar transistor providing an exponential current-voltage relationship. However, since complementary metal-oxide semiconductor (CMOS) transistors have approximately linear current-voltage characteristics, it is difficult to embody a variable gain amplifier linear in a dB scale, based on CMOS. Accordingly, a CMOS-based variable gain amplifier is embodied to have an exponential equation whose gain is approximated.
As well-known approximated exponential equations, there are Equations 1 and 2. Equation 1 is a Taylor approximation function that is a Taylor series expansion, and Equation 2 is a pseudo-exponential function.
                              f          ⁡                      (            x            )                          =                  1          +          x          +                                    1                              2                !                                      ⁢                          x              2                                                          Equation        ⁢                                  ⁢        1                                          f          ⁡                      (            x            )                          =                              1            +            x                                1            -            x                                              Equation        ⁢                                  ⁢        2            
FIG. 1 is a graph illustrating curves of dB scales according to Equations 1 and 2. Referring to FIG. 1, there are linear errors less than ±0.5 dB between Equations 1 and 2 and an ideal exponential function shown as a dotted line in FIG. 1, in a range of approximately 12 to 15 dB, respectively. That is, Equation 1 has a dB-linear section about 12 dB and Equation 2 has a dB-linear section about 15 dB. That is, a variable gain amplifier having a gain according to Equations 1 and 2 may change the gain only in the range of 12 dB and 15 dB, respectively.
FIG. 2 is a circuit diagram illustrating a conventional variable gain amplifier to which Equation 2 is applied. Referring to FIG. 2, the conventional variable gain amplifier includes a differential amplification unit 21 including two metal-oxide semiconductor (MOS) transistors M21 and M22 and diode-connected loads M23 and M24 connected to output terminals of the differential amplification unit 21. A differential gain of the variable gain amplifier of FIG. 2 is gm-M21,M22×Rout. In this case, gm-M21,M22 is a transconductance of a pair of input differentials M21 and M22 and Rout is an output impedance. Since an output of the variable gain amplifier is diode-connected loads M23 and M24, the Rout is proportional to 1/gm-M23,M24. In this case, gm-M23,M24 is a transconductance of the diode-connected loads M23 and M24. A gain variation may be obtained by controlling bias currents of the pair of input differentials M21 and M22 and loads M23 and M24. A gain of the variable gain amplifier of FIG. 2 is as Equation 3.
                              A          V                =                                            g                                                m                  -                                      M                    ⁢                                                                                  ⁢                    21                                                  ,                                  M                  ⁢                                                                          ⁢                  22                                                                    g                                                m                  -                                      M                    ⁢                                                                                  ⁢                    23                                                  ,                                  M                  ⁢                                                                          ⁢                  24                                                              =                                                                                          (                                          W                      /                      L                                        )                                                                              M                      ⁢                                                                                          ⁢                      21                                        ,                                          M                      ⁢                                                                                          ⁢                      22                                                                                                            (                                          W                      /                      L                                        )                                                                              M                      ⁢                                                                                          ⁢                      23                                        ,                                          M                      ⁢                                                                                          ⁢                      24                                                                                  ⁢                              (                                                      1                    +                    x                                                        1                    -                    x                                                  )                                                                        Equation        ⁢                                  ⁢        3            
Equation 3 is similar to the pseudo-exponential function shown in Equation 2. That is, the variable gain amplifier of FIG. 2 is designed based on Equation 2 and thus may provide 15 dB as a range having a linear error less than ±0.5 dB.
To extend a narrow width of the variable gain amplifier, generally, the variable gain amplifier has been embodied as multi-stage. As a result, much more power has been consumed, a larger chip area is required, and low noise characteristics and linearity have been generated. Particularly, as more gain stages are used, the noise characteristics and linearity are more deteriorated.
On the other hand, considering a frequency response of a circuit shown in FIG. 2, a bandwidth of the variable gain amplifier is determined by an input pole and an output pole. Since an output load is a diode-connected transistor, the output pole generally depends on the bias current of the transistors M23 and M24. When a gain is determined to be low, I0(1−x) and the bandwidth are extended. However, when the gain is determined to be high, I0(1−x) and the bandwidth are reduced. The input pole is a function of an input capacitance. In FIG. 2, an overall capacitance of an input terminal of the MOS transistor M21 is identical with a value obtained by adding a Miller multiplication of a capacitance CGD between a gate and a drain to a capacitance CGS between the gate and a source, that is, identical with CGS+(1+|Av|) CGD. As a result, the input pole is proportional to the gain. Accordingly, when the gain is determined to be high, the bandwidth is notably reduced.
Accordingly, in the field of the art, a variable gain amplifier is required, the amplifier having a reduced number of stages and a wide gain variation width and capable of providing a wide bandwidth at a high gain to consume a small amount of bias current and a small chip area.